NVIDIA’s Bill Dally to Deliver ISC’13 Opening Keynote Address
LEIPZIG, Germany — Bill Dally, who became NVIDIA’s Chief Scientist and Senior Vice President of Research after leading the computer science department at Stanford University, will discuss “Future Challenges of Large-Scale Computing” as the conference keynote address at the 2013 International Supercomputing Conference. ISC’13 will be held June 16 to 20 in Leipzig, Germany.
In his talk on Monday, June 17, Dally will discuss how high performance computing and data analytics share challenges of power, programmability, and scalability to realize their potential, with energy efficiency playing a greater role in determining system performance. At the same time, the large-scale parallelism and storage hierarchy of future machines pose programming challenges. Dally will discuss both these challenges and some of the technologies being developed to address them.
Dally joined NVIDIA in 2009 from Stanford, where he retains the Willard R. & Inez Kerr Bell professorship. While at Stanford, Dally and his team developed the system architecture, network architecture, signaling, routing and synchronization technology that is found in most large parallel computers today. In 2010, he was recognized with the ACM/IEEE Eckert–Mauchly Award for “outstanding contributions to the architecture of interconnection networks and parallel computers.” He has also been awarded with the Seymour Cray Computer Engineering Award and the Maurice Wilkes Award in 2004 and 2000 respectively.
Now in its 28th year, ISC’13 is expected to draw 2,500 attendees from academia, research institutions and industry around the world to the Congress Center Leipzig. More than 170 leading organizations in the field of high performance computing will showcase their products and research in the ISC exhibition.
Advance registration is now open for ISC’13 and by registering by May 15, attendees can save over 25 percent off the onsite registration rates. For details, visit the ISC’13 registration site.
Each day of the conference will feature a keynote talk, and here is a look at the subsequent keynotes:
- On Tuesday, June 18, Intel’s Stephen S. Pawlowski will discuss “Moore’s Law 2020,” in which he will provide a retrospective on why not only Moore’s Law has been essential in the past, but the technologies that maintain a “Moore squared” pace in supercomputing that brings us through and beyond Exascale. Pawlowski is the Chief Technology Officer for the Datacenter and Connected Systems Group (DCSG) and General Manager for the Architecture Group and DCSG Pathfinding at Intel, as well as an Intel Senior Fellow.
- The Wednesday, June 19, keynote will be given by Prof. Thomas Sterling of Indiana University, a perennial favorite at ISC. Each year for the last decade, Sterling has examined the progress and accomplishments in HPC of the preceding 12 months and considered their implications even as the observed trends have anticipated future progress. But on this, the tenth anniversary of this perennial keynote address, Sterling will look back not just on the previous year, but rather on the last 10 years. Sterling is Professor of Informatics and Computing at the Indiana University School of Informatics and Computing as well as serving as Chief Scientist and Associate Director of the PTI Center for Research in Extreme Scale Technologies (CREST). He also is an Adjunct Professor at the Louisiana State University (LSU) and CSRI Fellow at Sandia National Laboratories.
- In his Thursday, June 20, keynote talk, Prof. Gerhard Wellein will also take a cue from the past as he looks at the current state of HPC in his talk on “Fooling the Masses with Performance Results: Old Classics & Some New Ideas.” In 1991, David H. Bailey published his insightful "Twelve Ways to Fool the Masses When Giving Performance Results on Parallel Computers." In that humorous article, Bailey pinpointed typical “evade and disguise” techniques for presenting mediocre performance results in the best possible light. Wellein will give an update of Bailey’s "Twelve Ways." Old classics are presented alongside new "stunts" that reflect today's technological boundary conditions. Wellein is a professor at the Department for Computer Science at the University of Erlangen-Nuremberg, where he also leads the HPC group at Erlangen Regional Computing Center (RRZE).
For more information on the keynote talks and the full ISC’13 program, go to the ISC’13 website.
Every year ISC attracts a larger crowd than the previous year, drawing those interested in gaining new insights into their areas of interests in HPC, be it various HPC applications, engineering, advancement of HPC and other related technologies, or simply to meet new people to collaborate and do business.
ISC is the world’s oldest and the most significant high-performance computing conference and exhibition in Europe for the global HPC community. It offers a strong five-day technical program with a wide range of expert speakers and exhibits from leading research centers and vendors. A number of events complement the conference and industry tracks including Tutorials, Workshops, Panels, TOP500 Announcement, Research Paper Sessions, Birds of a Feather (BoF) Sessions, Research Poster Session, Student Cluster Competition, Exhibitor Forums, and the popular Vendor Showdown in a new format featuring leaders from industry and research centers and a number of satellite events organized by our partners and sponsors in conjunction with ISC’13. The conference has experienced tremendous growth over the last few years, with an estimated 2,500 participants from around the world expected to convene in Leipzig, June 16 – 20.
ISC’13 is open to IT-decision makers, scientists, members of the HPC global community and other interested parties. The ISC exhibition allows analysts, decision-makers from the automotive, defense, aeronautical, gas & oil, banking and other industries; solution providers, data storage suppliers, distributors, hardware and software manufacturers, the media, scientists and universities to see and learn firsthand about new products, applications and technological advances in the supercomputing industry today.