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AppliedMicro Readies 64-bit ARM-based SoC for HPC

Wed, 07/02/2014 - 11:58am
AppliedMicro

AppliedMicro has announced the readiness of the X-Gene Server on a Chip based on the 64-bit ARMv8-A architecture for High Performance Computing (HPC) workloads.   AppliedMicro has announced the readiness of the X-Gene Server on a Chip based on the 64-bit ARMv8-Aarchitecture for High Performance Computing (HPC) workloads.  

Power-efficient, high-performance and high-throughput computing is now a reality with the introduction of the X-Gene Server on a Chip with development kits available immediately, and production silicon available imminently. A heightened sense of urgency around the massive power consumption by data centers and their accelerated growth has driven AppliedMicro and ARM to focus on delivering power-efficient computing. HPC, as well as broader applications throughout the data center, can benefit from the performance, power consumption and total cost of ownership (TCO) advantages provided by AppliedMicro’s X-Gene Server on a Chip based on 64-bit ARM architecture.

AppliedMicro and its partners will demonstrated X-Gene running HPC workloads at the International Supercomputing Conference (ISC) 2014 in Leipzig, Germany. A replay of panel discussions highlighting thought leadership on ARM technology in HPC is available here.

“X-Gene’s ability to address segments of the HPC market that have traditionally utilized high-powered microprocessors, speaks to the performance and efficiency of X-Gene’s robust out-of-order custom ARMv8-A cores designed from the ground-up,” said Dr. Paramesh Gopi, president and CEO of AppliedMicro.  “Demanding HPC workloads are now able to take advantage of X-Gene’s wide memory subsystem and i ntegrated high-speed I/O.”

“Long limited by closed and proprietary system architectures, the HPC community is primed for benefits from the standardized and open 64-bit ARMv8-A architecture,” said Simon Segars, chief executive officer, ARM.  “The performance and flexibility of X-Gene’s ARMv8-A implementation of enterprise-class processor cores, integrated with high-speed analog and mixed-signal IP, can accelerate the adoption of more efficient solutions for high-performance computing.”

 

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