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The ARGO approach can be tested in practice in the AVES flight simulator of DLR. Courtesy of DLRIn aerospace, automation and automotive technologies, smart electronic computer systems have to meet a number of security and real-time requirements. In case of critical incidents, for instance, the software’s response time has to be very short. Programming of the corresponding applications is time- and cost-consuming. Partners of industry and research are now developing a tool chain for efficient, standardized, and real-time-capable programming under the EU consortium ARGO that is coordinated by Karlsruhe Institute of Technology (KIT). Development is based on the open source software Scilab.

More and more safety-critical embedded electronic solutions are based on rapid, energy-efficient multicore processors. “Two of the most important requirements of future applications are an increased performance in real time and further reduction of costs without adversely affecting functional safety,” Professor Jürgen Becker of the Institute for Information Processing Technology (ITIV) of KIT says, who coordinates ARGO. “For this, multicore processors have to make available the required performance spectrum at minimum energy consumption in an automated and efficiently programmed manner.”

Multicore systems are characterized by the accommodation of several processor cores on one chip. The cores work in parallel and, hence, reach a higher speed and performance. Programming of such heterogeneous multicore processors is very complex. Moreover, the programs have to be tailored precisely to the target hardware and to fulfill the additional real-time requirements. The ARGO EU research project, named after the very quick vessel in Greek mythology, is aimed at significantly facilitating programming by automatic parallelization of model-based applications and code generation. So far, a programmer had to adapt his code, i.e. the instructions for the computer, to the hardware architecture, which is associated with a high expenditure and prevents the code from being transferred to other architectures.

“Under ARGO, a new standardizable tool chain for programmers is being developed. Even without precise knowledge of the complex parallel processor hardware, the programmers can control the process of automatic parallelization in accordance with the requirements. This results in a significant improvement of performance and a reduction of costs,” Becker says.

In the future, the ARGO tool chain can be used to manage the complexity of parallelization and adaptation to the target hardware in a largely automated manner with a small expenditure. Under the project, real-time-critical applications in the areas of real-time flight dynamics simulation and real-time image processing are studied and evaluated by way of example.

Eight project partners of science and industry cooperate under the project: Apart from KIT, the University of Rennes (France), the Technological Educational Institute of Western Greece, the German Aerospace Center, and the Fraunhofer Institute for Integrated Circuits IIS (Germany) as well as Recore Systems B.V. (the Netherlands), Scilab Enterprises (France), and AbsInt Angewandte Informatik GmbH (Germany) are involved in ARGO.

“ARGO — WCET-aware Parallelization of Model-based Applications for Heterogeneous Parallel Systems” will be funded by the EU with EUR 3.9 million in the next three years. The project is coordinated by Professor Jürgen Becker, Head of the Institute for Information Processing Technology (ITIV) of KIT.

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